v {xschem version=3.4.4 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {type=subcircuit
format="@name @pinlist @symname"
template="name=S1
device=xTAG-psu"
}
V {}
S {}
E {}
L 4 -130 -50 130 -50 {}
L 4 -130 50 130 50 {}
L 4 -130 -50 -130 50 {}
L 4 130 -50 130 50 {}
L 4 130 0 150 0 {}
L 4 -150 0 -130 0 {}
L 7 130 30 150 30 {}
B 5 147.5 -2.5 152.5 2.5 {name=usb_power dir=in }
B 5 147.5 27.5 152.5 32.5 {name=pon_reset_ dir=out }
B 5 -152.5 -2.5 -147.5 2.5 {name=jtag_power dir=in }
T {@device} -36 -41 0 0 0.4 0.4 {}
T {@name} 130 -77 0 1 0.4 0.4 {}
T {usb_power} 125 -9 0 1 0.3 0.3 {}
T {pon_reset_} 125 21 0 1 0.3 0.3 {}
T {jtag_power} -125 -9 0 0 0.3 0.3 {}
