v {xschem version=3.4.4 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
K {type=POLARIZED_CAPACITOR
template="device=POLARIZED_CAPACITOR name=C? description=\\"polarized capacitor\\" numslots=0 symversion=0.1 "
tedax_format="footprint @name @footprint
value @name @value
device @name @device
@comptag"
format="@name @pinlist @value "

}
G {}
V {}
S {}
E {}
T {@name} 20 -50 2 1 0.333333 0.333333 {}


L 4 40 -40 40 0 {}
L 4 50 -20 70 -20 {}
L 4 20 -20 40 -20 {}
L 4 28.9 -40 28.9 -30 {}
L 4 24 -34.9 34 -34.9 {}


A 4 120 -20 70 165 30 {}




L 3 0 -20 20 -20 {}
B 5 -2.5 -22.5 2.5 -17.5 {pinnumber=1
pinseq=1
name=+
dir=inout
}
T {@#0:pinnumber} 15 -25 2 0 0.266667 0.266667 {layer=13}
L 3 70 -20 90 -20 {}
B 5 87.5 -22.5 92.5 -17.5 {pinnumber=2
pinseq=2
name=-
dir=inout
}
T {@#1:pinnumber} 75 -25 2 1 0.266667 0.266667 {layer=13}
